EEVblog #1327 – 3 Ways to FAIL at PCB Manufacture

Three ways to get your PCB design rejected by your PCB manufacturer. 1) Imperial/Metric conversion 2) Unexpected Trace/Space specifications 3) Goofing the Gerber resolution. Forum: https://www.eevblog.com/forum/blog/eevblog-1327-3-ways-to-fail-at-pcb-manufacture/ Podcast: Download

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EEVblog #1326 – How Engineering Minds Think Alike

Two almost identical complex designs published at almost the same time? How does that happen? Let’s go back to 1996 and see how similar Dave’s PC Logic Analyser design is to one published in Elektor Electronics magazine. Forum: https://www.eevblog.com/forum/blog/eevblog-1326-how-engineering-minds-think-alike/ Podcast: Download

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EEVblog #1325 – OPAMP Shootout – Datasheet Deep Dive

Part 2 in designing a better uCurrent. A datasheet shootout between the Maxim MAX4239 and the TI OPA189 A deeper dive into the datasheet specs from the previous video, looking at gain bandwidth product, noise, supply current and voltages, offset voltages histograms, input bias currents, recovery and settling time, and ...

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EEVblog #1323 – PCB Layout Review & Analysis

Dave analyses a PCB layout from the EEVblog forum and covers all sorts of tips for SMD layout, component placement, routing, layer stackup, controlled impedance traces, supply planes and power bypassing. Original forum thread: https://www.eevblog.com/forum/beginners/first-4-layer-pcb-traces-on-each-layer-a-good-idea/ Forum: https://www.eevblog.com/forum/blog/eevblog-1323-pcb-layout-review-analysis/ Podcast: Download

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